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CELLerity ATM NIC consists of our ATM SARchip and associatedelectronics, for interfacing the SPARC SBus workstation to an ATMnetwork.This single chip contains the ATM Adaptation Layer, ATM Layer, andPhysical Layer, along with associated firmware to perform Segmentationand Reassembly functions. Also, the chip includes a RISC microprocessor,32-bit DMA bus controller, multiple bus targets, and clock and datarecovery for the TAXI interface.A unique feature is multiple bus controllers, which allows for multimediaapplications. These can be multiple targets on the host, such as SystemBus, Video Frame buffers, and other target host applications -- eachseparately specified on a per-VC basis. This high-level integration ofATM function provides end-users and workstation vendors with a superiorATM solution.BENEFITS:- High Performance
- Proven Reliability
- Low Cost
- Low Power Consumption
- Multivendor Interoperability
- ATM Forum Compliant
FEATURES- Switched and Permanent VCs (Q.29431 support)
- ATM Forum UNIs
- SNMP Network Management Agent
- Multiple Interfaces: 100 Mbps (TAXI), OC-3 SONET, and 155 Mbps Cat.
5`- Multiple Bus controllers (Multimedia ready)
- AAL 3/4 Pass-Through
- Clock and Data Recovery on Chip (TAXI)
- ATM Adaptation Layers 1 and 5
Source Avail: No
Product Special Handling: None.
Operating Systems: Solaris Sparc 1.0,2.0,2.1,2.2,2.3
Connectware, Inc.
1301 E Arapaho Rd
Richardson, TX 75081
USA
Phone: (972) 907-1093
(800) 325-6467
Fax: (972) 907-1594